It is announced by Toshiba that it will dive into five bits per cell of capacity so that the flash standard for NAND is capable enough to expand the current density. This news came out in the recently held Flash Memory Summit, as the report has been shared by Tom’s Hardware.Toshiba Looking At Ways To Squeeze Five Bits Per Cell and this news is in conformation to that.
Those who do not know about how flash memory in NAND works several of its types is in display, each having a purpose and functionality that is quite distinct.
It has been a long time since now where SSD manufacturers are working on the storage density of HHD and trying to upend the process. Over the years, the performance in data transfer of SSD has got a hell and heaven difference. Manufacturers are thinking on the line on adding SSD with storage capacity, much more than before.
The capability of data transfer helps the flash memories to function well with boot rates getting faster and load times for application getting swifter than before. The moving parts are very few and this turns out to be an advantage. As a result, less energy is consumed and its vulnerability towards any kind of damage lessens.
In a cell, three bits are packed which has been the norm for standard flash memory. Since it is cheaper than MLC and SLC, for a long time now it has remained the standard. Multi-level cells and single-level cells are referred to as MLC and SLC respectively. A new generation quad-level cell is available which is called QLC.
It has been a long time since a bad reputation has been earned by SSD in the sense that it breaks down. However recently, NAND drives have been optimized by manufacturers that overlook endurance. Although it has got less durability in comparison to HHD’s, consumers is getting value for the money they spend.
Is anybody attempting to come up with something new other than Toshiba who is working on Penta-level cell (PLC)?
According to PCGamesN, it is all about the challenges.
As an instance, voltage levels are distinct and 32 of them are stored in a single cell, and the SSD controllers are needed to read them. The precision and accuracy are maintained with the reading along with a speed that is lightning fast. There lays a challenge concerning the voltage level and its total quantity is taken into perspective along with the scale which is small in this case.
New processes should be developed by Toshiba so that it bridges the gap between QLC and TLC.
One more thing should be addressed here. The bits per cell number are inversely proportional to the speed of the flash. Endurance capacity is another key factor in QLC which is a primary reason why it does not lasts long.
If remedial measures are not taken by Toshiba any time soon, the speed of PLC will get slower and it may even become brittle. The problem can be taken care of by NVMe protocol and Zoned Namespaces which may keep the problems in check about the areas of throughputs and latency.